AmpBenzScientist: "@PawelK@noagendasocial.com @lupyuen ARM is a RISC…" - CleverLibre Social

Apr 20, 2021, 06:51

AmpBenzScientist @AmpBenzScientist@social.cleverlibre.org

@lupyuen It seems to be Apache License v2.0 so I will verify this and release the source code.

Apr 20, 2021, 08:48

░▒▓█►─═ 𐌔Ꝋ𐌂𐌊𐌔 𐌐𐌓Ꝋ𐋄𐌙 𓂀 ═─◄█▓▒░ @PawelK@noagendasocial.com

@AmpBenzScientist
Hehe. What did you manage to break/make?

Apr 20, 2021, 09:07

AmpBenzScientist @AmpBenzScientist@social.cleverlibre.org

@PawelK @lupyuen I RE'd binary blobs for an open source project. It is Apache License v2 which explicitly allows for derivative works.

Apr 20, 2021, 09:41

░▒▓█►─═ 𐌔Ꝋ𐌂𐌊𐌔 𐌐𐌓Ꝋ𐋄𐌙 𓂀 ═─◄█▓▒░ @PawelK@noagendasocial.com

@AmpBenzScientist
Riscv arm or something else?

Apr 20, 2021, 09:50

AmpBenzScientist @AmpBenzScientist@social.cleverlibre.org

@PawelK @lupyuen arch=rv32imfc

Apr 20, 2021, 09:52

░▒▓█►─═ 𐌔Ꝋ𐌂𐌊𐌔 𐌐𐌓Ꝋ𐋄𐌙 𓂀 ═─◄█▓▒░ @PawelK@noagendasocial.com

@AmpBenzScientist
Shit you rock very exotic arch. Can i learn from you? Very interested in reversing arm and recompiling on riscv.

AmpBenzScientist @AmpBenzScientist@social.cleverlibre.org

@PawelK @lupyuen ARM is a RISC architecture. It would seem to be quite easy to get the code to run on RISC-V. (It's not) It's a rabbit hole but it shouldn't be horribly difficult to do. Just have a lot of patience.

Apr 20, 2021, 11:11 · · Tusky · · ·

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