@AmpBenzScientist @freemo Nice! I'm starting to read your reverse-engineered code. I'll be writing about my findings
@lupyuen @freemo Just be aware that it has errors. I dug through the documentation on the ISA and discovered that the Atomic extension was causing the illegal instructions due to two instructions not being supported with the extension. I'm testing my new processor in Ghidra and I haven't found any of the old warnings yet.
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@AmpBenzScientist Yep sure, I'll be comparing the reverse-engineered C code with the RISC-V assembly code
@lupyuen I'm getting a much better disassembly and C code. It's almost perfect now. The same code that was crashing disassemblers is now tamed.