A couple of shitposts on my timeline about the link protocol used by TI calculators reminded me about an oddity of it that I haven't seen elsewhere:
It's a two-wire (red, white, GND) open-drain interface. One might assume, that one wire's clock and the other one is data or that one's RX and the other one is TX. However, it's none of that:
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To transmit a '1', the sender pulls the white line low, the receiver acknowledges this by pulling the red line low. The sender then releases the white line and the receiver finally releases the red line. For transmitting a '0', the sender starts with pulling the red wire low.
This has the nice property that it does bit-level handshaking, flow control and is self-clocking.
Despite these advantages, I've never seen such kind of protocol used anywhere else. If you have, let us know!
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@karotte That's brilliant. I'd never thought of anything like that. So you transmit bits as fast as the receiver can soak them up.
In that form it's half-duplex and point to point, but I guess you could adapt it to be a master-slave bus protocol just by preceding the data stream with an address sent in a more normal SPI sort of way, probably at some kind of low speed like 400kHz? You'd need some kind of framing so the receiver knew when to stop acking.
