I can't get the idea of an MP/M laptop out of my mind. I'd change the current design to use the display adapter (TBD) to be a "serial terminal" of internal great speed, then there would be over 500K of RAM for user processes and maybe a disk-buffering IO system.
@tomjennings Sounds totally reasonable, and you could run it off a coin cell or solar panel and capacitor if you emulate the CPU on a low-power ARM or RISC-V microcontroller. SPI Flash is quite a bit snappier than a floppy
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